Employer description & source details
Astera Labs is looking for a Principal Post-Silicon Validation Engineer to take our connectivity silicon from first-silicon bring-up to production-ready. You will own the validation strategy for high-speed interconnect products, characterize real silicon in the lab, and drive root-cause analysis of the toughest system-level issues. As AI workloads scale into rack-level infrastructure, every link has to perform flawlessly. Your work will directly shape the quality, performance, and time-to-market of the products that connect the world's most advanced AI platforms, in a hyper-growth company where your technical judgment carries real weight. Architect and drive end-to-end post-silicon validation plans, from first-silicon bring-up through characterization and production release Define test strategies, coverage goals, and exit criteria in partnership with design, architecture, and product teams Lead lab bring-up of new silicon, including board, firmware, and software readiness Debug complex silicon, firmware, and system-level failures to root cause across the hardware/software boundary Characterize high-speed serial link performance, including margining, signal integrity, and compliance, across process, voltage, and temperature Partner with design and DFT teams to feed findings back into current and future product generations Develop scalable validation automation frameworks and test content using Python and C/C++ Build and improve lab infrastructure, test benches, and data analysis flows to increase validation throughput Analyze large validation datasets to identify trends, outliers, and risks early Mentor engineers and set best practices for validation methodology across the team Collaborate with customers and Field Applications Engineers to reproduce and resolve system-le
Extracted skills: python, c++, data analysis