Employer description & source details
Quadric is building the world’s first General-Purpose Neural Processing Unit (GPNPU) architecture, bringing high-performance AI, DSP, and ML compute to edge devices. As a Deep Learning Compiler Engineer, you will design and optimize the compiler stack (MLIR, TVM, LLVM) that bridges state-of-the-art neural network frameworks directly to our proprietary hardware architecture. You'll play a critical role in unlocking peak hardware performance, low latency, and memory efficiency for edge AI workloads. Deep Learning Compiler Infrastructure & Optimization Design, implement, and maintain compiler optimization passes targeting Quadric’s processor architecture using frameworks like MLIR, Apache TVM, or LLVM. Develop lowering pathways from high-level machine learning frameworks (PyTorch, TensorFlow, ONNX) down to optimized low-level kernel code. Optimize neural network performance for memory throughput, latency, compute unit utilization, and power consumption. Neural Network Model Parsing & Graph Transformation Implement graph-level optimizations, including operator fusion, layout transformation, quantization (INT8/FP16), and memory allocation strategies. Analyze novel deep learning model topologies (Transformers, CNNs, Vision-Language Models) and extend compiler support for new operators and primitives. Benchmark and profile end-to-end model performance to identify and resolve compiler bottlenecks. Collaborate closely with hardware and micro-architecture teams to define instruction set extensions, hardware acceleration features, and compiler requirements. Develop software simulators, functional models, and test benches to validate compiler correctness and generated binary performance. Participate in hardware bring-up and validation efforts on FPGA and ASIC platforms. Within your
Extracted skills: python, c++, machine learning